Speaker: Francesco Pesce
April 30th, 2026 | 11:30 am
DEIB - NECSTLab Meeting Room (Bld. 20)
Online by Zoom
Contact: Prof. Marco Santambrogio
Abstract
On Thursday, April 30th, 2026, we will have a new talk for the series #NECSTFridayTalk.During this talk, we will have, as speaker, Francesco Pesce, PhD at Dipartimento di Elettronica, Informazione e Bioingegneria.
The rapid growth of sparse machine learning (ML) workloads has highlighted the limitations in performance and energy efficiency of general-purpose architectures, making large-scale deployment increasingly unsustainable from both economic and environmental perspectives. This challenge has driven the development of domain-specific accelerators (DSAs) for sparse tensor algebra. However, achieving high efficiency in this domain requires extensive design space exploration (DSE), as sparse tensor computations exhibit wide variability in structure, sparsity, and encoding formats.
Performing DSE efficiently remains difficult. General-purpose cycle-accurate simulators, such as gem5, are prohibitively slow for realistic datasets. Moreover, developing accurate architectural models for DSAs in these simulators is complex and error-prone. For this reason, tools like TeAAL and SparseLoop focus specifically on simulating sparse tensor workloads, achieving orders-of-magnitude faster simulation while maintaining suitable accuracy on key design metrics. Yet, the irregularity and workload diversity of the sparse tensor algebra domain require evaluating potential designs across multiple real tensors, and even these tools are too slow for comprehensive DSE.
Turquoise is a hardware generation framework that leverages FPGA acceleration to enable fast and accurate simulation of sparse algebra DSAs. When modeling the state-of-the-art accelerator Gamma, Turquoise achieves accuracy comparable to TeAAL, the leading simulator in this domain, while delivering over two orders of magnitude speed-up on the same dataset. Even including RTL synthesis, implementation, and bitstream generation, steps required only once per simulated architecture, Turquoise achieves an order of magnitude faster simulation time, demonstrating the practicality of hardware-assisted DSE for sparse ML DSAs.
The NECSTLab is a DEIB laboratory, with different research lines on advanced topics in computing systems: from architectural characteristics, to hardware-software codesign methodologies, to security and dependability issues of complex system architectures.
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Every week, the “NECSTFridayTalk” invites researchers, professionals or entrepreneurs to share their work experiences and projects they are implementing in the “Computing Systems”.