Speakers: Marco Ronzani, Tommaso Spagnolo
February 27th, 2026 | 11:00 am
DEIB, "A. Alario" Seminar Room (Bld. 21)
Contact: phd-inf@polimi.it
Abstract
On February 27th, 2026, at 11:00 am Marco Ronzani and Tommaso Spagnolo, PHD Students in Information Technology, will give a seminar on "Designing Energy-Efficient RISC-V SoCs for Edge Computing" in DEIB “Alessandra Alario” Seminar Room (Building 21).Energy efficiency is the primary constraint in edge computing, where AI workloads must run under strict power, memory, and area limitations. This seminar discusses architectural strategies for designing energy-efficient RISC-V–based Systems-on-Chip (SoCs) for edge AI applications. We first analyze how microarchitectural choices, such as pipeline depth and resource sharing, affect performance, area, and energy efficiency in open-source embedded RISC-V cores, highlighting trade-offs between control-oriented and compute-intensive workloads. The seminar then explores RISC-V ISA customization through DSP, bit-manipulation, and packed-SIMD extensions, showing how instruction-level specialization reduces control overhead, memory accesses, and energy per operation. Finally, we examine the integration of tightly-coupled hardware accelerators in RISC-V microcontrollers, comparing different integration strategies and their impact on bandwidth, energy efficiency, and programmability. The talk concludes by presenting CPUs, ISA extensions, and accelerators as complementary elements in the design of energy-efficient edge systems.