Carlo Brandolese was born on March 17th, 1970 in Milan, where he is currently living. He attended the Liceo Scientifico G. Ganding in Lodi from 1983 to 1988, then he has been studying at the Politecnico di Milano from 1988 and he received his degree in Electronic Engineering in 1995. He has then been working as a CAD engineer at Italtel R&D Labs for two years. His activity is focused on the management of FPGA design flows and the support to the development of critical designs. He left Italtel in 1997 and he attended a Master Course in Electronic Design Automation at CEFRIEL. His work was devoted to the development of a framework and a set of methodologies for hardware/software codesign. He received his Master degree in 1998. His activity in the field of co-design has then been focused on low-power issues in embedded systems, with particular attention to the software components. He got his Ph.D. from the Politecnico di Milano in 2000 with a dissertation on the power analysis of the software components for embedded systems. From 1998 he is a researcher at CEFRIEL, and from 2001 he is also research consultant at the Department of Electronics and Information at the Politecnico di Milano. During the past four years he has been involved in a number of European Projects and he has been the technical manager of two of them. For more information on research work, teaching activities and personal interests, please visit my Home Page.