Scalability and Efficiency in Accelerator sharing on FPGA devices
Eli Bozorgzadeh
Professor of Computer Science Department
University of California, Irvine
DEIB - NECST Meeting Room (Building 20, basement floor)
October 26th, 2018
12.00 pm
Contacts:
Marco Santambrogio
Research Line:
System architectures
In the era of big data applications and heterogeneous high-performance computing architectures, deployment of accelerators such as GPUs and FPGAs is an unavoidable scheme to meet performance constraints for compute-intensive kernels of applications. FPGAs provide energy-efficient hardware customized accelerations that can be simultaneously accessed by various applications. The I/O software stack for data transfer to/from FPGA is further challenged by increasing number of parallel threads requesting access to accelerators and exponential growth in the volume of the data to send/receive to/from FPGA-accelerators. As a result, deployment of FPGA-based accelerators in large software systems has been challenged by the lack of a scalable scheme from application software to the I/O interface to allow multi-core to access FPGA-based accelerators at a high data transfer rate. We need an interface scheme that is scalable with increasing number of host cores, accelerators, and the volume of I/O data. Sharing accelerators as proposed in previous worksbrings resource contention issues in I/O software stack, i.e., a thread waiting for an accelerator when in use by another thread. To tackle this drawback, we present MQMAI, a multi-queue command-based access mechanism, to reduce the contention over the access to multiple accelerators. Our proposed technique enhances I/O parallelism for access to multiple accelerators. MQMAI is assembled of 1) a software stack on the host side, and 2) a hardware controller on the FPGA side. Experimental results presented in this talk support our claim that our proposed framework provides a scalable and efficient data transfer scheme for FPGA-based multi-accelerator systems.
The NECSTLab is a DEIB laboratory, with different research lines on advanced topics in computing systems: from architectural characteristics, to hardware-software codesign methodologies, to security and dependability issues of complex system architectures. Every week, the “NECST Friday Talk” invites researchers, professionals or entrepreneurs to share their work experiences and projects they are implementing in the “Computing Systems”.
Eli Bozorgzadeh is currently professor of Computer Science Department at the University of California, Irvine. She received her PhD in Computer Science at UCLA in 2003. Herresearch interests are in the area of design automation of reconfigurable and embedded systems, FPGA-based accelerators, and energy management in intermittently-powered embedded systems. She has published more than 80 papers in top-tier conferences and journals in the area of design automation of embedded systems and reconfigurable computing. She is a recipient of 2009 NSF CAREER. She has served as TPC in top conferences such as DAC, DATE, ICCAD, ASPDAC, and FPL. She is currently Associate editor of ACM Trans. on design automation of embedded systems (TODAES). She has also served as IEEE CEDA executive committee member (2015-2017).