Deep Convolutional Neural Networks (DCNNs) are quickly becoming leading-edge solutions for classifying and analyzing data, such as images, videos, and audio. While DCNNs provide more and more accurate machine learning models for many AI tasks, their success comes at the cost of higher computational complexity and memory requirements. In the meantime, the desire to deploy such solutions to battery-powered devices such as mobile phones and IoT devices forced the platforms to design efficient hardware architectures specialized in DCNN inference. In this talk, a basic introduction to the computational requirements of DCNN will be given depending on the level of expertise of the audience, and then the crucial elements of inference workloads on hardware will be discussed. A  taxonomy for inference engines which is present in the literature will be presented with some examples. The main focus of the talk will be convolution layers and how to handle the challenges they introduce for hardware architectures. The seminar is based on Prof. Joel Emer and Prof. Vivienne Sze's course of ACACES, 2018 summer school.

Ahmet Erdem was born on April 22nd of 1990, in Istanbul/Turkey. In 2013, He obtained his Bachelor degree in the field of Computer Science and Engineering from Sabanci University. He completed his Master's degree from Politecnico di Milano with a thesis discussing "Efficient OpenCL application autotuning for heterogeneous platforms". Currently, he is a Ph.D. student at the Dipartimento di Elettronica, Informazione e Bioingegneria of Politecnico di Milano and is collaborating with STMicroelectronics under the supervision of Prof. Cristina Silvano. His main research topics include convolutional neural network accelerators, application auto-tuning on heterogeneous platforms.