In this talk, we assess the use of Resistive memories (ReRAMs) in other applications than high-density storage arrays. ReRAMs are promising candidates to replace traditional nonvolatile memories, thanks to their better footprint scalability, faster programming time and enhanced endurance. After reporting on the recent technological directions we took, we study the circuit design opportunities. Innovative device behaviours transduce to new circuit/architecture freedom. First, we combine the ReRAM properties with CMOS to build low-power non-volatile flip-flop circuits that open new rooms for many energy-efficient computing systems. Then, we move away from the pure storage application by deriving the use of ReRAMs to digital reconfigurable logic circuits. In particular, we propose to leverage the intrinsic physical properties of ReRAMs to radically improve the different functional blocks of FPGAs. Indeed, instead of only using the ReRAMs as a memory, we extend their use as non-volatile switches and we design innovative circuits for routing elements. The outcome of such an approach is a complete redesign of the FPGA internal structure in which the memory/data path logic will be merged, in order for the memories to take integral part in the data path. This approach is expected to lead to a breakthrough in the field of high-performance reconfigurable platforms demonstrating more density, higher performance and higher energy efficiency.

Pierre-Emmanuel Gaillardon works for EPFL, Lausanne, Switzerland, as a research associate at the Laboratory of Integrated Systems (LSI). He holds an Electrical Engineer degree from CPE-Lyon, France (2008), a M.Sc. degree in Electrical Engineering from INSA Lyon, France (2008) and a Ph.D. degree in Electrical Engineering from CEA-LETI, Grenoble, France and the University of Lyon, France (2011). Starting January 2016, he will assume an assistant professor position within the Electrical and Computer Engineering (ECE) department at The University of Utah, Salt Lake City, UT, USA. Previously, he was research assistant at CEALETI, Grenoble, France and visiting research associate at Stanford University, Palo Alto, CA, USA. Dr. Gaillardon is an Associate Editor of the IEEE Transactions on Nanotechnology and a TPC member for many conferences. His research activities and interests are currently focused on the development of reconfigurable logic architectures and circuits exploiting emerging device technologies and novel EDA techniques.