Parallelization in the multicore era
Simone Campanoni
Electrical Engineering and Computer Science department of Northwestern University
DEIB - Conference Room
October 8th, 2015
10 am
Contact:
Marco Santambrogio
Research Line:
System architectures
Electrical Engineering and Computer Science department of Northwestern University
DEIB - Conference Room
October 8th, 2015
10 am
Contact:
Marco Santambrogio
Research Line:
System architectures
Sommario
The HELIX project achieves automatic parallelization of single-threaded code for commodity multicore architectures by co-designing the architecture with a parallelizing compiler and runtime system.
While servers can utilize cores through request-level parallelism, cores on client devices are severely under-utilized due to lack of parallelized applications.
Historically, automatic or manual parallelization has been successful only for problems that are embarrassingly amenable to parallel solutions.
But for most problems, the high cost of synchronizing and exchanging data between cores keeps parallelization from actually accelerating programs.
By leveraging the HELIX parallelization model and architectural support, we realize significant speedups even for programs such as SPECint that are assumed to lack thread-level parallelism.
To minimize core-to-core communication cost, HELIX augments commodity multicore architecture with lightweight hardware support co-designed with its compiler.
Furthermore, when controlled blurring of outputs is tolerable, HELIX applies semantics-relaxing code transformations to provide performance gains that scale nearly linearly with core count and provide energy savings.
While servers can utilize cores through request-level parallelism, cores on client devices are severely under-utilized due to lack of parallelized applications.
Historically, automatic or manual parallelization has been successful only for problems that are embarrassingly amenable to parallel solutions.
But for most problems, the high cost of synchronizing and exchanging data between cores keeps parallelization from actually accelerating programs.
By leveraging the HELIX parallelization model and architectural support, we realize significant speedups even for programs such as SPECint that are assumed to lack thread-level parallelism.
To minimize core-to-core communication cost, HELIX augments commodity multicore architecture with lightweight hardware support co-designed with its compiler.
Furthermore, when controlled blurring of outputs is tolerable, HELIX applies semantics-relaxing code transformations to provide performance gains that scale nearly linearly with core count and provide energy savings.
Biografia
Simone Campanoni is a tenure-track assistant professor at the Electrical Engineering and Computer Science department of Northwestern University.
Simone addresses research challenges through vertical specialization of the hardware/software stack.
Simone's main research areas are compilers and virtual machines, with special interest in computer architecture, runtime systems, operating systems, and programming languages.
Simone started the HELIX research project at Harvard University in 2010 as a post-doc working with Profs. David Brooks and Gu-Yeon Wei.
HELIX uses static and dynamic compilation, run-time optimization, and architecture specialization to extract coarse-grained parallelism for many-core architectures from complex "sequential" code.
Simone received his Ph.D. degree with highest honors from Politecnico di Milano University in 2009.
His dissertation discusses theoretical and practical performance implications of thread level parallelism.
To this end, Simone designed and built a bytecode virtual machine optimized for commodity multicore platforms.
Simone is the author of ILDJIT, a parallel compilation framework that includes static and dynamic compilers as well as a bytecode virtual machine.
ILDJIT has been used in several academic and industrial research projects, including HELIX.
Simone addresses research challenges through vertical specialization of the hardware/software stack.
Simone's main research areas are compilers and virtual machines, with special interest in computer architecture, runtime systems, operating systems, and programming languages.
Simone started the HELIX research project at Harvard University in 2010 as a post-doc working with Profs. David Brooks and Gu-Yeon Wei.
HELIX uses static and dynamic compilation, run-time optimization, and architecture specialization to extract coarse-grained parallelism for many-core architectures from complex "sequential" code.
Simone received his Ph.D. degree with highest honors from Politecnico di Milano University in 2009.
His dissertation discusses theoretical and practical performance implications of thread level parallelism.
To this end, Simone designed and built a bytecode virtual machine optimized for commodity multicore platforms.
Simone is the author of ILDJIT, a parallel compilation framework that includes static and dynamic compilers as well as a bytecode virtual machine.
ILDJIT has been used in several academic and industrial research projects, including HELIX.