Seminario: "Managing Resources for High Performance and Low Energy in General-Purpose Processors"
Israel Koren
University of Massachusetts at Amherst, MA, USA

Aula D 2.3
21/05/2010
Ore 11.00

Abstract:


Microarchitectural techniques, such as out-of-order execution and simultaneous multi-threading (SMT) improve processor performance dramatically. However, as processor design becomes more sophisticated, managing the abundant resources to achieve optimal performance and power consumption becomes increasingly more complicated. In this talk we investigate resource usage controlling techniques for microprocessors (single and multiple hardware contexts) targeting both energy and performance.
We first describe a compiler-based adaptive fetch throttling technique that provides energy savings with a low performance loss. We than discuss the resource allocation problem for SMT processors and present a novel adaptive resource partitioning algorithm to control the usage and sharing of processor resources.
Our results show that this algorithm outperforms the currently best dynamic resource allocation technique by 5.7% with regard to the overall throughput, and by 9.2% when fairness accorded to each thread is considered.
Finally, we propose resource adaptation approaches to control the number of powered-on ROB entries (for both shared- and divided-ROB structures), targeting both high performance and low energy. Our resource adaptation approach achieves considerable energy savings with negligible performance losses.

Short bio:

Israel Koren is a Professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst and a fellow of the IEEE. He has been a consultant to companies like IBM, Analog Devices, Intel, AMD and National Semiconductors. His research interests include fault-tolerant systems, secure cryptographic devices, VLSI yield and reliability, computer architecture and computer arithmetic. He publishes extensively and has over 200 publications in refereed journals and conferences. He is the author of the textbook "Computer Arithmetic Algorithms", 2nd Edition, A.K. Peters, Ltd., 2002, a co-author of the textbook "Fault Tolerant Systems", Morgan-Kaufman, 2007.

Contatti:
Luca Breveglieri

Aree di ricerca:
Metodologie e architetture software avanzate
Architetture