CONTREX - Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties
EU Research FP7
DEIB Role: Partner
Start date: 2013-10-01
Length: 36 months
Project abstract
Up to now mission & safety critical services of Systems of Systems (SoS) have been running on dedicated and often custom designed Hardware/Software platforms. In the near future such systems will be accessible, connected with or executed on devices comprising off-the-shelf HW/SW components. Significant improvements have been achieved supporting the design of mixed-critical systems by developing predictable computing platforms and mechanisms for segregation between applications of different criticalities sharing computing resources.
Such platforms enable techniques for the compositional certification of applications’ correctness, run-time properties and reliability.
CONTREX project will complement these important activities with an analysis and segregation of the extra-functional properties real-time, power, temperature and reliability. These properties risk becoming major cost roadblocks when 1) scaling up the number of applications per platform and the number of cores per chip, 2) moving to battery powered devices or 3) switching to smaller technology nodes. CONTREX will enable energy efficient and cost aware design through analysis and optimisation of real-time capability, power, temperature and reliability with regard to application demands at different criticality levels. To reinforce European leadership and industrial competitiveness the CONTREX approach will be integrated into existing model-based design methods that can be customized for different application domains and target platforms.
CONTREX will focus on requirements derived from the automotive, aeronautics and telecommunications domain and evaluate effectiveness of its results and drive integration into existing standards for the design and certification based on three industrial demonstrators.
Valuable feed-back to the industrial design practice, standards, and certification procedures is pursued.
Our economic goal is to improve energy efficiency by 20 % and to reduce cost per system by 30 % due to a more efficient use of the computing platform.
Such platforms enable techniques for the compositional certification of applications’ correctness, run-time properties and reliability.
CONTREX project will complement these important activities with an analysis and segregation of the extra-functional properties real-time, power, temperature and reliability. These properties risk becoming major cost roadblocks when 1) scaling up the number of applications per platform and the number of cores per chip, 2) moving to battery powered devices or 3) switching to smaller technology nodes. CONTREX will enable energy efficient and cost aware design through analysis and optimisation of real-time capability, power, temperature and reliability with regard to application demands at different criticality levels. To reinforce European leadership and industrial competitiveness the CONTREX approach will be integrated into existing model-based design methods that can be customized for different application domains and target platforms.
CONTREX will focus on requirements derived from the automotive, aeronautics and telecommunications domain and evaluate effectiveness of its results and drive integration into existing standards for the design and certification based on three industrial demonstrators.
Valuable feed-back to the industrial design practice, standards, and certification procedures is pursued.
Our economic goal is to improve energy efficiency by 20 % and to reduce cost per system by 30 % due to a more efficient use of the computing platform.
Project results
Scientific Publications:
- F. Herrera, I. Sander, K. Rosvall, E. Paone and G. Palermo, An Efficient Joint Analytical and Simulation-based Design Space Exploration Flow for Predictable Multi-Core Systems, 7th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools. RAPIDO´15., Amsterdam, Netherlands, Jan. 2015.
- Alessandro Danese, Tara Ghasempouri and Graziano Pravadelli, Automatic extraction of assertions from execution traces of behavioural models, Proc. of IEEE/ACM Design and Test in Europe (DATE), Grenoble, France, Mar 2015.
- Emad Ebeid, Franco Fummi and Davide Quaglia, Model-Driven Design of Network Aspects of Distributed Embedded Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, 2015.
- Michele Lora, Francesco Martinelli and Franco Fummi, Hardware Synthesis from Software-Oriented UML Descriptions, Proc. IEEE International Workshop on Microprocessor Test and Verification (MTV), Austin, TX, USA , 15–16 December, 2014.
- Sara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino, An Open-Source Framework for Formal Specification and Simulation of Electrical Energy Systems, accepted at ISLPED’14: International Symposium on Low Power Electronics and Design, San Diego, CA August 2014.
- Carlo Brandolese, Luigi Rucco, William Fornaciari. An optimal model to partition the evolution of periodic tasks in wireless sensor networks. IEEE international symposium on a world of wireless mobile and multimedia networks. Sydney, Australia, June 2014.
- Mariagiovanna Sami, Gianluca Palermo. Virtual Semi-Concurrent Self-Checking for Heterogeneous MPSoC Architectures: A DSE Approach In Proceedings of ASAP - International Conference on Application-specific Systems, Architectures and Processors. Zurich, Switzerland. June 2014.
- Edoardo Paone, Davide Gadioli, Gianluca Palermo, Vittorio Zaccaria and Cristina Silvano. Evaluating Orthogonality between Application Auto-Tuning and Run-Time Resource Management for Adaptive OpenCL Applications. In Proceedings of ASAP - International Conference on Application-specific Systems, Architectures and Processors. Zurich, Switzerland. June 2014.
