This project aims at the investigation of methods and tools for the design of reliable systems onto complex platforms, following the System on Programmable Chip (SoPC) paradigm, against both transient and permanent faults. The final goal is to design systems suitable for the automotive and avionics environments.
More precisely, research units will investigate:

• fault models specifically suited for the adopted platform and device
• techniques and methods for hardening the system being designed, in both its programmable and fixed components, tackling also the processor architecture, and
• achieved fault management analysis, through both simulated and in field fault injection campaigns.

The units background and competences will be integrated in order to define a set of methodologies for both designing and analyzing a hardened SoPC. An additional goal of the project is the definition of an architectural solution to be easily adopted and employed in critical application scenarios. The industrial producers of programmable devices have shown their interest in the development of solutions to harden their products, which then can directly be adopted for developing systems targeted for critical environments, characterized by high reliability requirements. The interaction with companies interested in the project will allow the identification of real application scenarios, to exploit the benefits of the proposed innovative solutions, providing a significant feedback for future improvements.