The research line concerns the design of circuits and systems fully integrated in silicon (ASIC). While the digital signal processing benefits from the scaling of CMOS processes in terms of speed, power consumption and area occupation, the performance of analog blocks such as gain, matching or noise is degraded. The fully integration of modern systems in silicon, especially those applied to high-capacity wireless terminals (5G) or pervasive low-cost low-energy wireless sensors (IoT), but also to radar systems for autonomous vehicles or smart microwave sensors at millimeter-wave frequencies, requires a paradigm shift in electronic design, in which digital processing serves each analog block to efficiently improve performance, preferably in the background of its normal operation. This approach allows to maximise scalability and energy efficiency of embedded systems. This is a field in which the major semiconductor companies in the world are engaged, and in which the development of new solutions proceeds in fast way. The research ranges from the circuit design of radio-frequency electronics to analog and mixed-signal (analog/digital) electronics for low-noise signal detection of MEMS sensors. On these themes, the lab has active collaborations with universities, research centers and semiconductor companies, such as Infineon Technologies, STMicroelectronics, Intel Labs.

• The research group has developed along the years a strong expertise in the field of RF frequency synthesis in silicon, has proposed several design solutions to solve the main issues and published an international textbook published in 2007 by Cambridge University Press. In this context, the group gave important contributions and is recognised as a center of excellence at the international level. Just to cite the most recent achievements, the group demonstrated frequency synthesisers and modulators operating at frequencies between 1 and 30 GHz for wireless applications (WiFi, LTE, 5G, IoT), in which the extensive adoption of digital calibrations (the only modulator includes more than 20 thousand transistors) allowed to simultaneously achieve low jitter (100-300 fs) at low power (4-10 mW). These techniques are being also applied in the design of radar systems in CMOS operating at 77 GHz for the automotive market.
• A new area where the group has recently started to be active is that of digitally-controlled RF power amplifiers and in general to digitally-intensive polar and LINC (“linear amplification with non-linear elements”) architectures for high-efficiency RF transmitters. The main target application is internet-of-things (IoT).
• Another area in which the group has provided important results is the study of the mechanisms of phase-noise generation in electrical oscillators and frequency dividers. A theoretical framework was introduced which explain the mechanisms of conversion of low-frequency flicker noise into noise at radio-frequencies in CMOS oscillators, and effective solutions to reduce this conversion have been demonstrated which improved the state of the art.
• Another area in which the group obtained important results is the design of fully integrated CMOS front-ends for sensors. In this context, the group tackled the challenge of neural recording applications, and the front-end design for MEMS-based (Micro Electro-Mechanical Sensors) accelerometers, gyroscopes, magnetometers, in which detection of readout channels and analog-to-digital conversion of the signal is needed at low noise and low power.